allow tcc be build from separate objects
If you want that, run: make NOTALLINONE=1
This commit is contained in:
38
x86_64-gen.c
38
x86_64-gen.c
@ -20,10 +20,11 @@
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <assert.h>
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#ifdef TARGET_DEFS_ONLY
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/* number of available registers */
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#define NB_REGS 5
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#define NB_REGS 5
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#define NB_ASM_REGS 8
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/* a register can belong to several classes. The classes must be
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sorted from more general to more precise (see gv2() code which does
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@ -60,14 +61,6 @@ enum {
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#define REX_BASE(reg) (((reg) >> 3) & 1)
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#define REG_VALUE(reg) ((reg) & 7)
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const int reg_classes[NB_REGS] = {
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/* eax */ RC_INT | RC_RAX,
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/* ecx */ RC_INT | RC_RCX,
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/* edx */ RC_INT | RC_RDX,
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/* xmm0 */ RC_FLOAT | RC_XMM0,
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/* st0 */ RC_ST0,
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};
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/* return registers for function */
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#define REG_IRET TREG_RAX /* single word int return register */
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#define REG_LRET TREG_RDX /* second word return register (for long long) */
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@ -85,6 +78,9 @@ const int reg_classes[NB_REGS] = {
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/* maximum alignment (for aligned attribute support) */
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#define MAX_ALIGN 8
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ST_FUNC void gen_opl(int op);
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ST_FUNC void gen_le64(int64_t c);
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/******************************************************/
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/* ELF defines */
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@ -100,6 +96,18 @@ const int reg_classes[NB_REGS] = {
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#define ELF_PAGE_SIZE 0x1000
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/******************************************************/
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#else /* ! TARGET_DEFS_ONLY */
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/******************************************************/
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#include "tcc.h"
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#include <assert.h>
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ST_DATA const int reg_classes[NB_REGS] = {
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/* eax */ RC_INT | RC_RAX,
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/* ecx */ RC_INT | RC_RCX,
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/* edx */ RC_INT | RC_RDX,
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/* xmm0 */ RC_FLOAT | RC_XMM0,
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/* st0 */ RC_ST0,
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};
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static unsigned long func_sub_sp_offset;
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static int func_ret_sub;
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@ -184,7 +192,7 @@ static int is_sse_float(int t) {
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}
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/* instruction + 4 bytes data. Return the address of the data */
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static int oad(int c, int s)
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ST_FUNC int oad(int c, int s)
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{
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int ind1;
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@ -198,7 +206,7 @@ static int oad(int c, int s)
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return s;
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}
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static void gen_addr32(int r, Sym *sym, int c)
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ST_FUNC void gen_addr32(int r, Sym *sym, int c)
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{
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if (r & VT_SYM)
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greloc(cur_text_section, sym, ind, R_X86_64_32);
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@ -206,7 +214,7 @@ static void gen_addr32(int r, Sym *sym, int c)
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}
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/* output constant with relocation if 'r & VT_SYM' is true */
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static void gen_addr64(int r, Sym *sym, int64_t c)
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ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
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{
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if (r & VT_SYM)
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greloc(cur_text_section, sym, ind, R_X86_64_64);
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@ -214,7 +222,7 @@ static void gen_addr64(int r, Sym *sym, int64_t c)
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}
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/* output constant with relocation if 'r & VT_SYM' is true */
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static void gen_addrpc32(int r, Sym *sym, int c)
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ST_FUNC void gen_addrpc32(int r, Sym *sym, int c)
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{
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if (r & VT_SYM)
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greloc(cur_text_section, sym, ind, R_X86_64_PC32);
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@ -1537,3 +1545,5 @@ void ggoto(void)
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/* end of x86-64 code generator */
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/*************************************************************/
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#endif /* ! TARGET_DEFS_ONLY */
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/******************************************************/
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