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x86-asm: Fix signed constants and opcode order

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Two things: negative constants were rejected (e.g. "add $-15,%eax").
Second the insn order was such that the arithmetic IM8S forms
weren't used (always the IM32 ones).  Switching them prefers those
but requires a fix for size calculation in case the opcodes were
OPC_ARITH and OPC_WLX (whose size starts with 1, not zero).
This commit is contained in:
Michael Matz
2016-05-14 04:33:41 +02:00
parent 080ec9fadd
commit 4f27e217a8
4 changed files with 12 additions and 3 deletions
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4
i386-asm.c
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@ -355,7 +355,7 @@ static void parse_operand(TCCState *s1, Operand *op)
if (op->e.v == (uint16_t)op->e.v)
op->type |= OP_IM16;
#ifdef TCC_TARGET_X86_64
if (op->e.v != (uint32_t)op->e.v)
if (op->e.v != (int32_t)op->e.v)
op->type = OP_IM64;
#endif
}
@ -551,6 +551,8 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
if (!(opcode >= pa->sym && opcode < pa->sym + 8*NBWLX))
continue;
s = (opcode - pa->sym) % NBWLX;
if ((pa->instr_type & OPC_BWLX) == OPC_WLX)
s++;
} else if (pa->instr_type & OPC_SHIFT) {
if (!(opcode >= pa->sym && opcode < pa->sym + 7*NBWLX))
continue;